Allowable Loss

When using an IC, irrespective of what specific power supply IC is employed, the amount of heat generated must be examined so that the maximum rating, Tjmax (the maximum junction temperature) is not exceeded. In some cases a thermal design must be performed. This is a required evaluation item in the case of ICs that must withstand the use of large power, such as a power supply IC, and transistors. In this section, we discuss [Allowable Loss], as part of [How to Read Power Supply IC Datasheets].

[Allowable Loss] is the last topic in the [How to Read Power Supply IC Datasheets]. In the previous sections we discussed such topics as [Datasheet Cover Page], [Block Diagram], [Absolute Maximum Ratings and Recommended Operating Conditions], [Key to Electric Characteristics], [How to Interpret Property Graphs and Waveforms], [Application Circuit Examples], [Component Selection] and [Input Equivalent Circuit]. We recommend that you go through all the topics as an aid in reviewing all data sheets and conducting the design process smoothly.

Allowable Loss

The allowable losses for an IC (or for most electronic components) refers to the maximum power dissipation that keeps the generated temperature below that which allows the IC to maintain the acceptable level of performance. If the allowable losses for a power supply IC are indicated as “1.2W”, for example, in simple terms the acceptable level will be a power loss under a given condition not exceeding 1.2W.

In the case of an LDO regulator, for example, the simple calculation would be as follows:

   If input is 5V, output 3.3V, and input current (self-consumption + load) 0.7A, （5V-3.3V）×0.7A＝1.19W

This provides a “bare minimum safe”level. In actuality a little more careful examination will be necessary.

In many cases, allowable losses are indicated in the form of a graph. An example graph:

In the graph, let us look at the curve for ① 2.66W. It is evident that up to 25℃, 2.66W is acceptable. Above that level, allowable losses diminish in a straight line. At the maximum operating temperature Ta (85℃) for the IC, it is clear that a 1.4W level may be tolerable.

Curves ① to ④ show board and area conditions, and indicate that the allowable losses vary with the mounting conditions. The values of thermal resistance θj-a are also shown under the conditions. In recent years many power supply ICs are packaged in surface mounting. Because allowable losses change significantly depending on the mounting conditions, it is helpful to describe required conditions in details in this manner.

If these conditions are described, it suffices to use as “reference” the allowable losses that are closest to your own design. The enclosure of the word “reference” in quotation marks is for a purpose: to emphasize the fact that it is for “reference” only. More of this will be discussed later.

As an example, if the board conditions in curve ② are substantially close to your own design conditions and if the upper limit on Ta on the mounted board is 50℃, it is clear that losses below 1.4W are tolerable. In the example of the LDO regulator mentioned above, up to 0.8A can be allowed. In the case of a switching regulator, the calculation becomes a bit complicated. However, if the efficiency (output power/input power) can be measured, the loss will be 1 ? efficiency. For the built-in power transistor type, the amount of loss can be determined by this equation. However, in the case of an external power transistor type, the amount of loss attributable exclusively to the control IC must be calculated (measured). It goes without saying that for a power supply circuit the heat of power transistors must be calculated.

Looking at this graph, is there something that stands out? Because generally the graph provides good enough information, the question becomes: Can the graph be read a little more deeply?
　
   （1) What is the reason that the allowable losses remain the same up to 0℃ to 25℃?
   （2) What does it mean that at Ta＝150℃ the amount of allowable losses is 0?

Theoretically speaking, Point（1）sounds odd. When the ambient temperature declines, on paper it should be possible to increase the power dissipation. As for Point (2), as you may have noticed immediately, from this fact it is apparent that Tjmax is 150℃. Because no losses can be tolerated, the allowable heat dissipation is zero, or in other words the condition is Ta＝Tj.

Because I have been asked the Question（1）before, now that we have read Tjmax from the graph and the quantity θj-a is also given, let us now calculate by taking the condition ① as an example:

   From Tj＝θj-a×PD＋Ta, the condition holds that 47.0℃/W×2.66W （@ Ta＝25℃）＋25℃＝150℃　←Tjmax.
　　　
   So, 150℃＝47.0℃/W×x W（@ Ta＝0℃）＋0℃, then x＝ 3.19W　←At 0℃, on paper this much loss should
   be tolerable.

Actually, there are different schools of thought on this point. Probably as a matter of convention, if room temperature is generally assumed to be 25℃, even when no current is conducting, Tj is 25℃. If a limit is set to be 2.66W or greater, the risk of exceeding the Tjmax exists at the instant power is turned on. We believe that for an allowable loss at 25℃ or less it would be safe to apply a 25℃ value. Although there are cold-climate regions in the world that do not experience ambient temperatures above 25℃, those are special conditions. If the ambient conditions are verified, we believe that the allowable losses can be matched to the calculations.

Although this has been a little digression, the point that we are making, however, is that if an allowable-loss graph is provided, there are no problems in using such a graph; however, it is important to check it out in accordance with the fundamental equation for the determination of Tj. Furthermore, results of calculations must be validated in terms of actual measurements.

We have seen graphs in which the numerical values representing an allowable-loss graph did not match the computation results, apparently because values that were previously derated were used as allowable values. Conversely, if the allowable loss value that is provided is exactly equal to the Tjmax, using the IC under the loss conditions amounts, from a reliability standpoint, to the use under worst conditions; in such a case, the operating life of the IC becomes compromised. Consequently, normally derating is performed, that is, an adequate margin of safety is provided. For this purpose, the basis for the information that is provided must be verified to some extent.

Finally, let us explain what we meant by stating that “for reference” mentioned above signified “for emphasis”, and the reasons for stating that. In actual practice, it is rare that the conditions for a board indicated in a data sheet agree with your own design. In most cases, what the data sheet provides is taken as a rule of thumb, meaning “approximately” or “it is better than this, but worse than that”. Furthermore, the presence of an array of power devices near the IC, and any prevailing cooling conditions (such as the use of a fan) and the geometry involving the case or installation location, can make the heat dissipation, thermal resistance, and Ta considerably indefinite factors, rendering them too complicated to be validated by means of calculations.

Consequently, the process of evaluating the design based upon supplied information, verifying the results by calculation, and ultimately performing actual measurements becomes extremely important. In particular, in recent years the high-density packaging for ICs has progressed, with the result that the amount of space needed for adequate heat dissipation or the use of a heat sink has become an increasingly difficult option to be pursued. It would be good to understand that in the design of a power supply device, heat evaluation and thermal design are factors that require considerable amount of work.

• Switching regulator
• Transistor
• LDO