DC/DC Converter PCB Layout
Placement of Inductors
In the previous discussion of "Placement of Thermal Vias", we explained heat dissipation using the circuit board and structure. This time we return to components, and explain "Placement of Inductors".
We begin with a brief review of the characteristics of inductors relating to PCB layout.
When a current flows in an inductor, magnetic lines of force are generated. When the magnetic lines of force pass through a conductor, such as the copper foil in a PCB, eddy currents are generated in that part of the conductor. That is, if there is an electrically conducting body near the inductor, problems may be caused by eddy currents in the body. The eddy currents flow in a direction so as to cancel the magnetic lines of force, and so the inductance is reduced, and the Q factor falls (losses are increased). Here, Q is one parameter representing the amount of loss in an inductor, and a higher Q factor means lower losses. In addition, when copper foil near an inductor is a signal line, eddy currents may cause noise to propagate in signals, with possible adverse effects on the circuit operation.
There is another issue to consider as well: an inductor is a component that generates heat. When a current flows in an inductor, heat is generated by the resistive component of the windings and by other losses. When an inductor reaches a high temperature, its parts may be degraded, and it is well known that when a ferrite core is used, if the Curie temperature is exceeded, the inductance will drop sharply. Current ratings and resistance values are indicated in the specifications as guidelines, and in actual implementation, the problem of heat dissipation must be carefully considered.
With all this in mind, please check the following important points.
Placement of Inductors
Although not as important as in the case of an input capacitor, an inductor should be placed as close as possible to the IC in order to minimize radiation noise from the switching node.
If the copper foil area is made too broad in order to reduce wiring resistance and dissipate heat, the copper foil may act as an antenna, which increases EMI, and so the area of the copper foil should not be made any larger than is necessary.
Figure 6-a shows a desirable layout designed with the wiring area set considering the effect on EMI, and Figure 6-b shows an undesirable layout designed with the wiring area set larger than is necessary.
Current resistance can be used as a guide when deciding on the specific wiring width. Figure 5 is a graph showing the conductor width and the rise in temperature due to self- heating when a certain current is passed.
For example, when a 2 A current is passed in wiring with a conductor thickness of 35 μm, a conductor width of 0.53 mm is sufficient in order to hold the rise in temperature to no more than 20°C. However, the wiring is affected by heat generated by peripheral components and by the ambient temperature, and so a sufficient margin must be included. For example, for a one-ounce (35 μm) board, a width of 1 mm or greater is recommended, and for a two-ounce (70 μm) board the recommended width is at least 0.7 mm.
Where wiring in the vicinity of an inductor is concerned, no GND layer wiring can be placed immediately below the inductor (Figure 6-c). As explained above, this is because magnetic lines of force would pass through the GND layer, which is a conductor, causing eddy currents, and the effect of canceling the magnetic lines of force would cause the inductor value to fall and the Q factor to drop (losses would increase).
Signal lines other than GND should likewise not be placed directly below an inductor, because of the possibility of eddy currents causing switching noise to propagate in signals. In a case where a signal line must pass directly below an inductor, the inductor should be a component with a closed magnetic circuit structure, so that leakage of magnetic force lines is minimal. However, actual measurements must always be performed to ensure that no problems occur.
Moreover, attention must also be paid to the spaces between wiring of inductor terminals. If the distance between the wiring of the terminals is short, as in Figure 6-d, high-frequency signals of the switching node may be induced in the output via stray capacitance.
As is true for components other than inductors as well, there are various constraints on component placement and wiring routing. However, it is extremely important that the most important points be thoroughly incorporated into a layout design. Where the layout deviates from the ideal, actual measurements must always be performed to ensure there are no problems.
・Inductors should be placed as close to ICs as possible.
・Copper foil areas should not be made broader than is necessary.
・Do not place the GND layer directly below an inductor. Signal lines should also be placed so as not to run under an inductor.
・Do not cause the wiring of inductor pins to approach each other.